? 1999 fairchild semiconductor corporation ds009941 www.fairchildsemi.com november 1988 revised november 1999 74ac240 ? 74act240 octal buffer/line driver with 3-state outputs 74ac240 74act240 octal buffer/line driver with 3-state outputs general description the ac/act240 is an octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which provides improved pc board density. features i cc and i oz reduced by 50% inverting 3-state outputs drive bus lines or buffer memory address registers outputs source/sink 24 ma act240 has ttl-compatible inputs ordering code: device also available in tape and reel. specify by appending suffix letter ?x? to the ordering code. logic symbol ieee/iec connection diagram pin descriptions truth tables h = high voltage level l = low voltage level x = immaterial z = high impedance fact ? is a trademark of fairchild semiconductor corporation. order number package number package description 74ac240sc m20b 20-lead small outline integrated circuit (soic), jedec ms-013, 0.300 ? wide body 74ac240sj m20d 20-lead small outline package (sop), eiaj type ii, 5.3mm wide 74ac240mtc mtc20 20-lead thin shrink small outline package (tssop), jedec mo-153,4.4mm wide 74ac240pc n20a 20-lead plastic dual-in-line package (pdip), jedec ms-001, 0.300 ? wide 74act240sc m20b 20-lead small outline integrated circuit (soic), jedec ms-013, 0.300 ? wide body 74act240sj m20d 20-lead small outline package (sop), eiaj type ii, 5.3mm wide 74act240mtc mtc20 20-lead thin shrink small outline package (tssop), jedec mo-153,4.4mm wide 74act240pc n20a 20-lead plastic dual-in-line package (pdip), jedec ms-001, 0.300 ? wide pin names description oe 1 , oe 2 3-state output enable inputs i 0 ? i 7 inputs o 0 ? o 7 outputs inputs outputs oe 1 i n (pins 12, 14, 16, 18) ll h lh l hx z inputs outputs oe 2 i n (pins 3, 5, 7, 9) ll h lh l hx z
www.fairchildsemi.com 2 74ac240 74act240 absolute maximum ratings (note 1) recommended operating conditions note 1: absolute maximum ratings are those values beyond which damage to the device may occur. the databook specifications should be met, with- out exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. fairchild does not recommend operation of fact ? circuits outside databook specifications. dc electrical characteristics for ac note 2: all outputs loaded; thresholds on input associated with output under test. note 3: maximum test duration 2.0 ms, one output loaded at a time. note 4: i in and i cc @ 3.0v are guaranteed to be less than or equal to the respective limit @ 5.5v v cc . supply voltage (v cc ) ? 0.5v to + 7.0v dc input diode current (i ik ) v i = ? 0.5v ? 20 ma v i = v cc + 0.5v + 20 ma dc input voltage (v i ) ? 0.5v to v cc + 0.5v dc output diode current (i ok ) v o = ? 0.5v ? 20 ma v o = v cc + 0.5v + 20 ma dc output voltage (v o ) ? 0.5v to v cc + 0.5v dc output source or sink current (i o ) 50 ma dc v cc or ground current per output pin (i cc or i gnd ) 50 ma storage temperature (t stg ) ? 65 c to + 150 c junction temperature (t j ) pdip 140 c supply voltage (v cc ) ac 2.0v to 6.0v act 4.5v to 5.5v input voltage (v i ) 0v to v cc output voltage (v o ) 0v to v cc operating temperature (t a ) ? 40 c to + 85 c minimum input edge rate ( ? v/ ? t) ac devices v in from 30% to 70% of v cc v cc @ 3.3v, 4.5v, 5.5v 125 mv/ns minimum input edge rate ( ? v/ ? t) act devices v in from 0.8v to 2.0v v cc @ 4.5v, 5.5v 125 mv/ns symbol parameter v cc (v) t a = + 25 ct a = ? 40 c to + 85 c units conditions typ guaranteed limits v ih minimum high level 3.0 1.5 2.1 2.1 v out = 0.1v input voltage 4.5 2.25 3.15 3.15 v or v cc ? 0.1v 5.5 2.75 3.85 3.85 v il maximum low level 3.0 1.5 0.9 0.9 v out = 0.1v input voltage 4.5 2.25 1.35 1.35 v or v cc ? 0.1v 5.5 2.75 1.65 1.65 v oh minimum high level 3.0 2.99 2.9 2.9 output voltage 4.5 4.49 4.4 4.4 v i out = ? 50 a 5.5 5.49 5.4 5.4 v in = v il or v ih 3.0 2.56 2.46 i oh = ? 12 ma 4.5 3.86 3.76 v i oh = ? 24 ma 5.5 4.86 4.76 i oh = ? 24 ma (note 2) v ol maximum low level 3.0 0.002 0.1 0.1 output voltage 4.5 0.001 0.1 0.1 v i out = 50 a 5.5 0.001 0.1 0.1 v in = v il or v ih 3.0 0.36 0.44 i ol = 12 ma 4.5 0.36 0.44 v i ol = 24 ma 5.5 0.36 0.44 i ol = 24 ma (note 2) i in (note 4) maximum input leakage current 5.5 0.1 1.0 av i = v cc , gnd i oz maximum 3-state v i (oe) = v il , v ih leakage current 5.5 0.25 2.5 av i = v cc , gnd v o = v cc , gnd i old minimum dynamic 5.5 75 ma v old = 1.65v max i ohd output current (note 3) 5.5 ? 75 ma v ohd = 3.85v min i cc (note 4) maximum quiescent supply current 5.5 4.0 40.0 av in = v cc or gnd
3 www.fairchildsemi.com 74ac240 74act240 dc electrical characteristics for act note 5: all outputs loaded; thresholds on input associated with output under test. note 6: maximum test duration 2.0 ms, one output loaded at a time. symbol parameter v cc t a = + 25 ct a = ? 40 c to + 85 c units conditions (v) typ guaranteed limits v ih minimum high level 4.5 1.5 2.0 2.0 v v out = 0.1v input voltage 5.5 1.5 2.0 2.0 or v cc ? 0.1v v il maximum low level 4.5 1.5 0.8 0.8 v v out = 0.1v input voltage 5.5 1.5 0.8 0.8 or v cc ? 0.1v v oh minimum high level 4.5 4.49 4.4 4.4 vi out = ? 50 a output voltage 5.5 5.49 5.4 5.4 v in = v il or v ih 4.5 3.86 3.76 v i oh = ? 24 ma 5.5 4.86 4.76 i oh = ? 24 ma (note 5) v ol maximum low level 4.5 0.001 0.1 0.1 vi out = 50 a output voltage 5.5 0.001 0.1 0.1 v in = v il or v ih 4.5 0.36 0.44 v i ol = 24 ma 5.5 0.36 0.44 i ol = 24 ma (note 5) i in maximum input 5.5 0.1 1.0 av i = v cc , gnd leakage current i oz maximum 3-state 5.5 0.25 2.5 a v i = v il , v ih leakage current v o = v cc , gnd i cct maximum 5.5 0.6 1.5 ma v i = v cc ? 2.1v i cc /input i old minimum dynamic 5.5 75 ma v old = 1.65v max i ohd output current (note 6) 5.5 ? 75 ma v ohd = 3.85v min i cc maximum quiescent 5.5 4.0 40.0 a v in = v cc supply current or gnd
www.fairchildsemi.com 4 74ac240 74act240 ac electrical characteristics note 7: voltage range 3.3 is 3.3v 0.3v voltage range 5.0 is 5.0v 0.5v ac electrical characteristics note 8: voltage range 5.0 is 5.0v 0.5v capacitance v cc t a = + 25 ct a = ? 40 c to + 85 c symbol parameter (v) c l = 50 pf c l = 50 pf units (note 7) min typ max min max t plh propagation delay 3.3 1.5 6.0 8.0 1.0 9.0 ns data to output 5.0 1.5 4.5 6.5 1.0 7.0 t phl propagation delay 3.3 1.5 5.5 8.0 1.0 8.5 ns data to output 5.0 1.5 4.5 6.0 1.0 6.5 t pzh output enable time 3.3 1.5 6.0 10.5 1.0 11.0 ns 5.0 1.5 5.0 7.0 1.0 8.0 t pzl output enable time 3.3 1.5 7.0 10.0 1.0 11.0 ns 5.0 1.5 5.5 8.0 1.0 8.5 t phz output disable time 3.3 1.5 7.0 10.0 1.0 10.5 ns 5.0 1.5 6.5 9.0 1.0 9.5 t plz output disable time 3.3 1.5 7.5 10.5 1.0 11.5 ns 5.0 1.5 6.5 9.0 1.0 9.5 v cc t a = + 25 ct a = ? 40 c to + 85 c symbol parameter (v) c l = 50 pf c l = 50 pf units (note 8) min typ max min max t plh propagation delay 5.0 1.5 6.0 8.5 1.5 9.5 ns data to output t phl propagation delay 5.0 1.5 5.5 7.5 1.5 8.5 ns data to output t pzh output enable time 5.0 1.5 7.0 8.5 1.0 9.5 ns t pzl output enable time 5.0 2.0 7.0 9.5 1.5 10.5 ns t phz output disable time 5.0 2.0 8.0 9.5 2.0 10.5 ns t plz output disable time 5.0 2.5 6.5 10.0 2.0 10.5 ns symbol parameter typ units conditions c in input capacitance 4.5 pf v cc = open c pd power dissipation capacitance 45.0 pf v cc = 5.0v
5 www.fairchildsemi.com 74ac240 74act240 physical dimensions inches (millimeters) unless otherwise noted 20-lead small outline integrated circuit (soic), jedec ms-013, 0.300 ? wide body package number m20b
www.fairchildsemi.com 6 74ac240 74act240 physical dimensions inches (millimeters) unless otherwise noted (continued) 20-lead small outline package (sop), eiaj type ii, 5.3mm wide package number m20d
7 www.fairchildsemi.com 74ac240 74act240 physical dimensions inches (millimeters) unless otherwise noted (continued) 20-lead thin shrink small outline package (tssop), jedec mo-153, 4.4mm wide package number mtc20
www.fairchildsemi.com 8 74ac240 74act240 octal buffer/line driver with 3-state outputs physical dimensions inches (millimeters) unless otherwise noted (continued) 20-lead plastic dual-in-line package (pdip), jedec ms-001, 0.300 ? wide package number n20a fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and fairchild reserves the right at any time without notice to change said circuitry and specifications. life support policy fairchild ? s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. a critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
|
